Fault isolation in nonlinear analog circuits with tolerance using the neural network-based L1-norm
نویسندگان
چکیده
optimization technique for fault diagnosis of nonlinear analog circuits with tolerance. This paper deals with fault isolation in nonlinear analog circuits with tolerance under an insufficient number of independent voltage approach is proposed and utilized in locating the most likely faulty elements in nonlinear circuits. The validity of the proposed method is verified by both extensive computer simulations and practical examples. One simulation example is presented in the paper. measurements. A neural network-based L,-norm optimization 2. L,-NORM OPTIMIZATION APPROACH FOR FAULT LOCATION OF NONLINEAR CIRCUITS Assume that a nonlinear resistive circuit has n nodes (excluding the reference node). m of which are accessible. There are h branches, of which p elements are linear and q nonlinear, h=p+q. The components are numbered in the order of linear to nonlinear elements. For simplicity. we assume that all nonlinear elements are voltage controlled, with characteristics being denoted as
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